TRACKING AND BITWISE BALANCING ADC WITH WEIGHT REDUNDANCY

Abstract

The article presents the informational and structural aspects underlying the organization of an analog-to-digital converter operating in both tracking and bitwise balancing modes. When organizing tracking balancing significant differences in the input signal can occur. Therefore, in such cases, in order accelerate the ADC output to the tracking mode, it is proposed by the authors to temporarily transfer it to the bitwise analog-to-digital conversion mode. To speed up the conversion in the tracking mode, the authors use the high-speed reverse counter in the number system with weight redundancy proposed by the authors. The time diagram of the operation modes of bitwise-tracking ADC in the SCHVN is given. The structural organization of this converter is described. A block diagram of the development of the control unit for the control signals for the operation of the proposed ADC is developed and presented. Using the solution proposed by the authors will expand the scope of the tracking ADCs.