The principle of operation, the structure and design of the converter unit formats in the post-binary coprocessor

Authors

  • Oleksandr Yakovych Anopriienko Ukraine, 83001, Donetsk, Artem str., 58, tel. 0506777270
  • Serhii Vasyliovych Ivanytsia Ukraine, 83001, Donetsk, Artem str., 58, tel. 0502587118
  • Serhii Volodymyrovych Kulibaba Ukraine, 83001, Donetsk, Artem str., 58, tel. 0953878055

Keywords:

postbinary data format, tetracode, VHDL, model, coprocessor

Abstract

Necessity of creating postbinary formats converter of the key block postbinary coprocessor is shown. Principles of operation and structure of this unit, and features of hardware-based implementation are observed. Results of simulation of signals and modelling of simplified model of convecter unit postbinary formats, which is developed in VHDL,are pointed presented.

Author Biographies

Oleksandr Yakovych Anopriienko, Ukraine, 83001, Donetsk, Artem str., 58, tel. 0506777270

c.t.s., Professor., dean of CST DNTU

Serhii Vasyliovych Ivanytsia, Ukraine, 83001, Donetsk, Artem str., 58, tel. 0502587118

Postgraduate student of CI DoNTU

Serhii Volodymyrovych Kulibaba, Ukraine, 83001, Donetsk, Artem str., 58, tel. 0953878055

undergraduate of the CI DoNTU

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How to Cite

[1]
O. Y. Anopriienko, S. V. Ivanytsia, and S. V. Kulibaba, “The principle of operation, the structure and design of the converter unit formats in the post-binary coprocessor”, ІТКІ, vol. 26, no. 1, Nov. 2013.

Issue

Vol. 26 No. 1 (2013): Information Technology and Computer Engineering

Section

Computer systems and components

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