HIGH-LINE VOLTAGE BUFFERS FOR HIGH-PERFORMANCE ADCS AND DACS

Authors

  • Valentyn Bagatskyi V. M. Glushkov Institute of Cybernetics of the NAS of Ukraine
  • Serhii Bogomolov Vinnytsia National Technical University
  • Serhii Zakharchenko Vinnytsia National Technical University

DOI:

https://doi.org/10.31649/1999-9941-2023-56-1-44-51

Keywords:

high-linearity, high-performance, voltage buffer, ADC, DAC, push-pull structure

Abstract

The article analyzes the proposed methods of structural and functional organization of highly linear voltage buffers built according to two-stroke symmetrical structures. In the first method, it is assumed to increase the resistance of the current outputs. Thanks to this, it is possible to stabilize the collector-emitter junction voltage of the transistors of the output stages. In the second method, it is proposed to reduce the influence of the base current of the transistors of the output stages, which will reduce the linearity error. In the third method, it is proposed to increase the linearity without reducing the speed level, by stabilizing the collector-emitter voltages of the output stages. It is shown that the use of voltage stabilization of the collector-emitter transitions makes it possible to improve the circuit characteristics by 1÷2 orders of magnitude. Analytical dependencies describing the linearity errors of the cores of voltage buffers, which are built according to a two-stroke symmetrical structure, are derived. It is shown that the proposed approaches allow to reduce the errors of linearity and zero shift by an order of magnitude or more. To determine the components that affect the appearance of the error, an equivalent scheme for replacing the output of the voltage buffer core is considered. It was determined that the proposed methods of building voltage buffers have a common drawback, namely, low load capacity, which is determined by the output resistances of the circuits. An approach that allows increasing the load capacity of voltage buffers is considered. It is shown that it makes it possible to reduce the output resistance by 2÷3 orders of magnitude. In order to increase the load capacity and maintain the specified linearity of the voltage buffer scheme, it is proposed to supplement it with a two-stroke two-channel current amplifier. The use of the proposed methods and approaches for the construction of voltage buffers allows obtaining such devices that have the necessary characteristics and can be used as part of high-performance ADCs and DACs.

Author Biographies

Valentyn Bagatskyi, V. M. Glushkov Institute of Cybernetics of the NAS of Ukraine

Doctor of Technical Sciences, leading researcher of V. M.  Glushkov Institute of Cybernetics of the NAS of Ukraine

Serhii Bogomolov, Vinnytsia National Technical University

Candidate of Technical Sciences, Associate Professor of the Computer Engineering Department

Serhii Zakharchenko, Vinnytsia National Technical University

Candidate of Technical Sciences, Associate Professor of the Computer Engineering Department

References

Walt Kesler, Analog-digital conversion. ADI Central Application Department, 2004, 1127 p.

Alan B. Grebene, Bipolar and MOS analog integrated circuit design. New Jersey: Whiley Classic Library, 2002, 915 p.

O. D. Azarov, O. V. Dudnyk, S. V. Bogomolov, O. V. Kaduk, "Buffer Cascade," Patent of Ukraine H03K 5/22, G05B 1/00. No. 51014 IPC (2009), 25.06.2010 [in Ukrainian].

U. Tietze, Ch. Schenk, E. Gamm, Electronic Circuits: Handbook for Design and Application. 2nd ed., Springer, USA, 2008, 1543 p.

O. D. Azarov, V. A. Garnaga, Push-pull direct current amplifiers for multi-bit self-calibrating information form converters. Vinnytsia, Ukraine: VNTU, 2011, 156 p. [in Ukrainian].

O. D. Azarov, S. V. Bogomolov, V. Ya. Stejskal, "Transfer linearity errors of the input stage of push-pull current amplifiers," Information Technology and Computer Engineering. Vinnytsia National Technical University, no. 3(19), p. 4-12. 2010 [in Ukrainian].

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Abstract views: 112

Published

2023-03-14

How to Cite

[1]
V. Bagatskyi, S. Bogomolov, and S. Zakharchenko, “HIGH-LINE VOLTAGE BUFFERS FOR HIGH-PERFORMANCE ADCS AND DACS”, ІТКІ, vol. 56, no. 1, pp. 44–51, Mar. 2023.

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